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Synthesis of switched-current Ladder Derived Group delay Equalizers

Xie, Y. and Al Hashimi, B. (2002) Synthesis of switched-current Ladder Derived Group delay Equalizers. In: Proc. IEE Analog Signal Processing Symposium, 1 November 2002, Oxford, UK. 1/1- 6/1.

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Abstract

This paper describes the design of switched-current group delay equalizers. The design process is based on the pole-zero mirroring technique; with equalizer z-transfer functions generated using an optimization algorithm. To facilitate the systematic implementation of the equalizers, a model describing the design process is developed. A novel feature of the equalizers implementation is that wave structures are employed in realizing the equalizer poles instead of integrators. MATLAB and SI simulation results based on a 6th-order equalizer are included. The results demonstrate that the equalizer can reduce the delay of a 5th-order, 1MHz lowpass SI elliptic filter from 155ns to <20ns over the entire filter bandwidth.

Item Type:Conference or Workshop Item
Creator/Authors:
Yan Xie
Bashir Al Hashimi
Research Group:Current ECS Groups > Electronic and Software Systems
Old ECS Groups > Electronic Systems and Devices Group
Date:2002
Information about this record:
Performance Indicator:EZ~02~02~04
Citations:
Downloads (2010):75
ID Code:8722
Last Modified:23 Sep 2011 10:30
Deposited On:05 Jan 2004 by Xie, Yan

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